This application claims the priority of Korean Patent Application No. 10-2004-0097594, filed on Nov. 25, 2004, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates to a method of manufacturing nano scale semiconductor devices using nano particles, and more particularly, to a method of manufacturing nano scale semiconductor devices such as P-N junction device or Complementary Metal-Oxide Semiconductors (CMOS) using nano particles without a mask or a fine pattern.
2. Description of the Related Art
As the increase in the semiconductor technologies, the integration density of semiconductor devices increases. The micro lithography technique largely contributed to the high integration of the semiconductor devices. However, the basic technologies for manufacturing the semiconductor devices do not have changed significantly. That is, material layers were stacked on a substrate, and after forming a mask using a photoresist on the material layer, the mask was patterned through a micro lithography process. Afterward, the mask and the material layer were selectively etched under an appropriate gas atmosphere. The research for increasing the integration density of a semiconductor device is mainly concentrated on the technique for fine patterning a mask using a light source having a short wavelength and the technique for etching appropriately the fine pattern.
However, there is a limit to the technique for fine patterning a mask using the optical technique. At the present time, it is prevailed to manufacturing a semiconductor device having a line width of 90 nm, and there are many difficulties to pattern below that level. Accordingly, a new technique to increase the integration density of a semiconductor device is needed. The new technique for manufacturing semiconductor devices is a manufacturing technique using nano particles.
The method of manufacturing a nano structure has been disclosed in U.S. Pat. No. 4,407,695 in “Natural lithographic fabrication of microstructures over large areas”. According to the U.S. Pat. No. 4,407,695, as depicted in FIG. 1A, a material layer 2 is formed on a substrate 1, and nano particles 3 are coated on the material layer 2. Afterward, as depicted in FIG. 1B, an etching process is performed by irradiating ion beams 8 vertically to the coated nano particles 3. Then, cylinder shaped nano structures 4 are formed on the substrate 1 by removing the exposed portions to the ion beams 8.
However, in the U.S. Pat. No. 4,407,695, the nano particles are used only as masks. Therefore, the method proposed in the U.S. Pat. No. 4,407,695 can only a simple structure as depicted in FIG. 1B and the complicated conventional processes using a photoresist can not be simplified.